The present application describes systems and techniques relating to radio frequency identification (RFID) tag design and use, for example, an RFID chip design that facilitates programming and erasing of a non-volatile memory included within the RFID tag.
Traditional RFID tags have included non-volatile memory, such as electrically erasable programmable read-only memory (EEPROM). Programming of RFID memory involves properly setting the voltage, which can be complicated because of the high voltages frequently required to program EEPROM memory cells. Additionally, the charge captured by an EEPROM memory cell during programming changes exponentially with the voltage. Sufficient voltages should be achieved to guarantee programming of the memory cell, but too much voltage can cause catastrophic failure of the circuitry.
A typical approach to programming an RFID memory relies on trial and error. A low voltage is first applied in the programming cycle to assure that the circuitry does not become damaged and that the memory is not overstressed, which can lead to reliability problems. If the programming is found to be successful through a subsequent read of the memory, further programming is not needed. However, in many cases the programming is found to be insufficient so a second cycle is applied with a slightly higher voltage, and this may be repeated many times until the memory is properly programmed. This technique can require numerous cycles and considerable time.